Aspects for adjusting resistive memory write driver strength based on write error rate (WER) are disclosed. In one aspect, a write driver strength control circuit is provided to adjust a write current provided to a resistive memory based on a WER of the resistive memory. The write driver strength control circuit includes a tracking circuit configured to determine the WER of the resistive memory based on write operations performed on resistive memory elements. The write driver strength control circuit includes a write current calculator circuit configured to compare the WER to a target WER that represents the desired yield performance level of the resistive memory. A write current adjust circuit in the write driver strength control circuit is configured to adjust the write current based on this comparison. The write driver strength control circuit adjusts the write current to perform write operations while reducing write errors associated with breakdown voltage.