发明申请
- 专利标题： Instruction and Logic for Speculative Request Support for Prefetching
- 专利标题（中）： 提取请求支持预取的指令和逻辑
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申请号： US14671569申请日： 2015-03-27
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公开(公告)号： US20160283232A1公开(公告)日： 2016-09-29
- 发明人: Raanan Sade , Ryan L. Carlson , Larisa Novakovsky , Erik G. Hallnor , Ravi Rajwar , Roman Dementiev
- 申请人： Raanan Sade , Ryan L. Carlson , Larisa Novakovsky , Erik G. Hallnor , Ravi Rajwar , Roman Dementiev
- 主分类号： G06F9/30
- IPC分类号： G06F9/30 ; G06F9/38
摘要：
A processor includes a core and a prefetcher. The prefetcher includes logic to issue a request for data including a requested prefetch. The core includes logic to receive an indication of the request, determine whether the request is for a restricted region of memory, and, based upon whether the request is for the restricted region of memory, allow or deny the request.
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