发明申请
US20160283389A1 Memory Controller For Multi-Level System Memory With Coherency Unit
审中-公开
用于具有一致性单元的多级系统存储器的存储器控制器
- 专利标题: Memory Controller For Multi-Level System Memory With Coherency Unit
- 专利标题(中): 用于具有一致性单元的多级系统存储器的存储器控制器
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申请号: US14671892申请日: 2015-03-27
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公开(公告)号: US20160283389A1公开(公告)日: 2016-09-29
- 发明人: ISRAEL DIAMAND , NIR MISGAV , ARAVINDH ANANTARAMAN , ZVIKA GREENFIELD
- 申请人: ISRAEL DIAMAND , NIR MISGAV , ARAVINDH ANANTARAMAN , ZVIKA GREENFIELD
- 主分类号: G06F12/08
- IPC分类号: G06F12/08
摘要:
An apparatus is described that includes a memory controller having an interface to couple to a multi-level system memory. The memory controller also includes a coherency buffer and coherency services logic circuitry. The coherency buffer is to keep cache lines for which read and/or write requests have been received. The coherency services logic circuitry is coupled to the interface and the coherency buffer. The coherency services logic circuitry is to merge a cache line that has been evicted from a level of the multi-level system memory with another version of the cache line within the coherency buffer before writing the cache line back to a deeper level of the multi-level system memory if at least one of the following is true: the another version of said cache line is in a modified state; the memory controller has a pending write request for the cache line.