发明申请
- 专利标题: Method Of Forming 3D Vertical NAND With III-V Channel
- 专利标题(中): 用III-V通道形成3D垂直NAND的方法
-
申请号: US14666687申请日: 2015-03-24
-
公开(公告)号: US20160284724A1公开(公告)日: 2016-09-29
- 发明人: Peter Rabkin , Jayavel Pachamuthu , Johann Alsmeier , Masaaki Higashitani
- 申请人: SanDisk Technologies Inc.
- 申请人地址: US TX Plano
- 专利权人: SANDISK TECHNOLOGIES INC.
- 当前专利权人: SANDISK TECHNOLOGIES INC.
- 当前专利权人地址: US TX Plano
- 主分类号: H01L27/115
- IPC分类号: H01L27/115 ; H01L27/06 ; H01L21/768 ; H01L21/02 ; H01L21/28
摘要:
Disclosed herein is 3D memory with vertical NAND strings having a III-V compound channel, as well as methods of fabrication. The III-V compound has at least one group III element and at least one group V element. The III-V compound provides for high electron mobility transistor cells. Note that III-V materials may have a much higher electron mobility compared to silicon. Thus, much higher cell current and overall cell performance can be achieved. Also, the memory device may have better read-write efficiency due to much higher carrier mobility and velocity. The tunnel dielectric of the memory cells may have an Al2O3 film in direct contact with the III-V NAND channel. The drain end of the NAND channel may be a metal-III-V alloy in direct contact with a metal region. The body of the source side select transistor could be formed from the III-V compound or from crystalline silicon.
公开/授权文献
- US09685454B2 Method of forming 3D vertical NAND with III-V channel 公开/授权日:2017-06-20
信息查询
IPC分类: