Invention Application
- Patent Title: EXPOSED PAD INTEGRATED CIRCUIT PACKAGE
- Patent Title (中): 曝光式集成电路封装
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Application No.: US14671727Application Date: 2015-03-27
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Publication No.: US20160286652A1Publication Date: 2016-09-29
- Inventor: Reynaldo Corpuz Javier , Alok Kumar Lohia , Andy Quang Tran
- Applicant: Texas Instruments Incorporated
- Main IPC: H05K1/18
- IPC: H05K1/18 ; G06T7/00 ; H04N7/18 ; H05K3/30

Abstract:
An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board.
Public/Granted literature
- US11195269B2 Exposed pad integrated circuit package Public/Granted day:2021-12-07
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