Invention Application
- Patent Title: METHOD OF FORMING FINE PATTERN OF SEMICONDUCTOR DEVICE
- Patent Title (中): 形成半导体器件精细图案的方法
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Application No.: US15066492Application Date: 2016-03-10
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Publication No.: US20160293445A1Publication Date: 2016-10-06
- Inventor: Je-Woo HAN , Junho YOON , Kyohyeok KIM , Dongchan KIM , Sungyeon KIM , Jaehong PARK , Jinyoung PARK , KyungYub JEON
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Priority: KR10-2015-0047075 20150402
- Main IPC: H01L21/311
- IPC: H01L21/311

Abstract:
A method of fabricating a semiconductor device is disclosed. The method may include forming an target layer on a substrate, forming a mask pattern on a target layer, performing a first process to etch the target layer and form a first sub-trench, and performing a second process to further etch the target layer and form a second sub-trench. First and second sidewall patterns may be formed on a sidewall of the mask pattern to be used as an etch mask in the first and second processes, respectively. Outer sidewalls of the first and second sidewall patterns may be formed to have different angles with respect to a top surface of the substrate.
Public/Granted literature
- US09812335B2 Method of forming fine pattern of semiconductor device Public/Granted day:2017-11-07
Information query
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