Invention Application
US20160327871A1 Inspection Methods, Substrates Having Metrology Targets, Lithographic System and Device Manufacturing Method
有权
检测方法，具有计量目标的基板，平版印刷系统和器件制造方法
- Patent Title: Inspection Methods, Substrates Having Metrology Targets, Lithographic System and Device Manufacturing Method
- Patent Title (中): 检测方法，具有计量目标的基板，平版印刷系统和器件制造方法
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Application No.: US15105349Application Date: 2014-11-20
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Publication No.: US20160327871A1Publication Date: 2016-11-10
- Inventor: Tjitte NOOITGEDAGT , Marc Jurian KEA
- Applicant: ASML NETHERLANDS B.V.
- Applicant Address: NL Veldhoven
- Assignee: ASML NETHERLANDS B.V.
- Current Assignee: ASML NETHERLANDS B.V.
- Current Assignee Address: NL Veldhoven
- Priority: EP13198362.9 20131219
- International Application: PCT/EP2014/075165 WO 20141120
- Main IPC: G03F7/20
- IPC: G03F7/20
Abstract:
Disclosed is a method of measuring overlay between upper and lower layers on a substrate using metrology targets formed by a lithographic process. The lithographic process is of a multiple-patterning type whereby first and second distinct populations of structures are formed in a single one of said layers (L1) by respective first and second patterning steps. The metrology target (620) in the single one of said layers comprises a set of structures of which different subsets (642A, 642B) are formed in said first and second patterning steps. An overlay measurement on this target can be used to calculate a combined (average) overlay performance parameter for both of the first and second patterning steps.)
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