发明申请
US20160336954A1 SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTER AND ACCURACY IMPROVING METHOD THEREOF 有权
连续逼近模拟数字转换器及其改进方法

  • 专利标题: SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTER AND ACCURACY IMPROVING METHOD THEREOF
  • 专利标题(中): 连续逼近模拟数字转换器及其改进方法
  • 申请号: US15134866
    申请日: 2016-04-21
  • 公开(公告)号: US20160336954A1
    公开(公告)日: 2016-11-17
  • 发明人: Chihhou TSAI
  • 申请人: MediaTek Inc.
  • 主分类号: H03M1/38
  • IPC分类号: H03M1/38 H03M1/12
SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTER AND ACCURACY IMPROVING METHOD THEREOF
摘要:
A successive approximation register analog-to-digital converter (SAR ADC) with high accuracy is disclosed. Within the SAR ADC, a SAR logic circuit combines the output signal of a comparator collected during at least two successive cycles of a plurality of cycles of a search scheme of digital representation of an analog input and, accordingly, makes a one-step control for a voltage difference between a positive and a negative input terminal of the comparator. At least three capacitor network switching choices for a capacitor network of the SAR ADC are provided by the one-step control. By the one-step control, a selection between the at least three capacitor network switching choices is made according to at least two comparison results of the comparator obtained during the at least two successive cycles. In this manner, comparator noise is utilized as an additional quantization level to improve the overall ADC noise performance.
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