Invention Application
- Patent Title: CHIP PACKAGE AND MANUFACTURING METHOD THEREOF
- Patent Title (中): 芯片包装及其制造方法
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Application No.: US15157776Application Date: 2016-05-18
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Publication No.: US20160343882A1Publication Date: 2016-11-24
- Inventor: Yi-Ying KUO , Ming-Chieh HUANG , Hsi-Chien LIN
- Applicant: XINTEC INC.
- Main IPC: H01L31/02
- IPC: H01L31/02 ; H01L31/18 ; H01L31/0216

Abstract:
A chip package includes a chip, an insulating layer, a flowing insulating material layer and conductive layer. The chip has a conductive pad, a side surface, a first surface and a second surface opposite to the first surface, which the side surface is between the first surface and the second surface, and the conductive is below the first surface and protruded from the side surface. The insulating layer covers the second surface and the side surface, and the flowing insulating material layer is disposed below the insulating layer, and the flowing insulating material layer has a trench exposing the conductive pad protruded form the side surface. The conductive layer is disposed below the flowing insulating material layer and extended into the trench to contact the conductive pad.
Public/Granted literature
- US09799778B2 Chip package having a trench exposed protruding conductive pad Public/Granted day:2017-10-24
Information query
IPC分类: