A method of communication between a first circuit and a second circuit coupled together over a two-line bus having a clock line and a data line. A power signal is provided to the second circuit over the two-line bus by setting the clock line and the data line to different potential levels. A bit is transmitted from one of the first circuit and the second circuit to the other of the first circuit and the second circuit by setting the data line to a potential level according to a state of the bit to be transmitted when the clock line is set at a first potential level. A bit is read in response to a transition of the clock line from the first potential level to a second potential level, different from the first potential level.