Invention Application
- Patent Title: REDUCING READ LATENCY OF MEMORY MODULES
- Patent Title (中): 减少存储器模块的读取时间
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Application No.: US15114098Application Date: 2014-01-31
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Publication No.: US20160371015A1Publication Date: 2016-12-22
- Inventor: Raphael GAY , Siamak TAVALLAEI
- Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- International Application: PCT/US2014/014024 WO 20140131
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F13/16 ; G06F12/0802

Abstract:
Example implementations relate to using an alternative memory (AltMem) to reduce read latency of a memory module having a dynamic random-access memory (DRAM). In example implementations, write data may be written to the DRAM and to the AltMem. A read command may be issued to the AltMem if a DRAM read latency time for executing the read command is greater than an AltMem read latency time for executing the read command. Data read from the AltMem in response to the read command may be received.
Public/Granted literature
- US09916098B2 Reducing read latency of memory modules Public/Granted day:2018-03-13
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