Invention Application
- Patent Title: TRANSACTIONAL MEMORY MANAGEMENT TECHNIQUES
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Application No.: US15160786Application Date: 2016-05-20
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Publication No.: US20160371036A1Publication Date: 2016-12-22
- Inventor: Irina Calciu , Justin E. Gottschlich , Tatiana Shpeisman
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F9/46

Abstract:
Techniques for improved transactional memory management are described. In one embodiment, for example, an apparatus may comprise a processor element, an execution component for execution by the processor element to concurrently execute a software transaction and a hardware transaction according to a transactional memory process, a tracking component for execution by the processor element to activate a global lock to indicate that the software transaction is undergoing execution, and a finalization component for execution by the processor element to commit the software transaction and deactivate the global lock when execution of the software transaction completes, the finalization component to abort the hardware transaction when the global lock is active when execution of the hardware transaction completes. Other embodiments are described and claimed.
Public/Granted literature
- US10001949B2 Transactional memory management techniques Public/Granted day:2018-06-19
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