Invention Application
US20160372425A1 THROUGH SILICON VIA DEVICE HAVING LOW STRESS, THIN FILM GAPS AND METHODS FOR FORMING THE SAME
审中-公开
通过具有低应力的薄膜,薄膜和其形成方法的硅
- Patent Title: THROUGH SILICON VIA DEVICE HAVING LOW STRESS, THIN FILM GAPS AND METHODS FOR FORMING THE SAME
- Patent Title (中): 通过具有低应力的薄膜,薄膜和其形成方法的硅
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Application No.: US15247513Application Date: 2016-08-25
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Publication No.: US20160372425A1Publication Date: 2016-12-22
- Inventor: Huang Liu , Sarasvathi Thangaraju , Chun Yu Wong
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: US KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: US KY Grand Cayman
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/48 ; H01L25/07 ; H01L23/498

Abstract:
Aspects of the present invention generally relate to approaches for forming a semiconductor device such as a TSV device having a “buffer zone” or gap layer between the TSV and transistor(s). The gap layer is typically filled with a low stress, thin film fill material that controls stresses and crack formation on the devices. Further, the gap layer ensures a certain spatial distance between TSVs and transistors to reduce the adverse effects of temperature excursion.
Public/Granted literature
- US10043764B2 Through silicon via device having low stress, thin film gaps and methods for forming the same Public/Granted day:2018-08-07
Information query
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