发明申请
- 专利标题： PROCESS FOR INTEGRATED CIRCUIT FABRICATION INCLUDING A UNIFORM DEPTH TUNGSTEN RECESS TECHNIQUE
- 专利标题（中）： 集成电路制造工艺，包括均匀深度浸渍技术
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申请号： US15273777申请日： 2016-09-23
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公开(公告)号： US20170012105A1公开(公告)日： 2017-01-12
- 发明人: QING LIU , RUILONG XIE , CHUN-CHEN YEH
- 申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , GLOBALFOUNDRIES INC. , STMICROELECTRONICS, INC.
- 主分类号： H01L29/423
- IPC分类号： H01L29/423 ; H01L27/088 ; H01L29/66 ; H01L21/8234 ; H01L29/49
摘要：
Dummy gates are removed from a pre-metal layer to produce a first opening (with a first length) and a second opening (with a second length longer than the first length). Work function metal for a metal gate electrode is provided in the first and second openings. Tungsten is deposited to fill the first opening and conformally line the second opening, thus leaving a third opening. The thickness of the tungsten layer substantially equals the length of the first opening. The third opening is filled with an insulating material. The tungsten is then recessed in both the first and second openings using a dry etch to substantially a same depth from a top surface of the pre-metal layer to complete the metal gate electrode. Openings left following the recess operation are then filled with a dielectric material forming a cap on the gate stack which includes the metal gate electrode.
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