发明申请
US20170018465A1 SILICON GERMANIUM AND SILICON FINS ON OXIDE FROM BULK WAFER 审中-公开
氧化硅上的硅锗和硅氧烷

SILICON GERMANIUM AND SILICON FINS ON OXIDE FROM BULK WAFER
摘要:
A method for forming fins includes growing a SiGe layer and a silicon layer over a surface of a bulk Si substrate, patterning fin structures from the silicon layer and the SiGe layer and filling between the fin structures with a dielectric fill. Trenches are formed to expose end portions of the fin structures. A first region of the fin structures is blocked off. The SiGe layer of the fin structures of a second region is removed by selectively etching the fin structures from the end portions to form voids, which are filled with dielectric material. The silicon layer of the fin structures is exposed. The SiGe layer in the first region is thermally oxidized to drive Ge into the silicon layer to form SiGe fins on an oxide layer in the first region and silicon fins on the dielectric material in the second region.
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IPC分类:
H 电学
H01 基本电气元件
H01L 半导体器件;其他类目中不包括的电固体器件(使用半导体器件的测量入G01;一般电阻器入H01C;磁体、电感器、变压器入H01F;一般电容器入H01G;电解型器件入H01G9/00;电池组、蓄电池入H01M;波导管、谐振器或波导型线路入H01P;线路连接器、汇流器入H01R;受激发射器件入H01S;机电谐振器入H03H;扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R;一般电光源入H05B;印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K;在具有特殊应用的电路中使用的半导体器件见应用相关的小类)
H01L21/00 专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70 .由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理;集成电路器件或其特殊部件的制造(由预制电组件组成的组装件的制造入H05K3/00,H05K13/00)
H01L21/77 ..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理(电可编程只读存储器或其多步骤的制造方法入H01L27/115)
H01L21/78 ...把衬底连续地分成多个独立的器件(改变表面物理特性或者半导体形状的切割入H01L21/304)
H01L21/82 ....制造器件,例如每一个由许多元件组成的集成电路
H01L21/84 .....衬底不是半导体的,例如绝缘体
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