Invention Application
- Patent Title: MULTI-LAYER SUBSTRATE WITH AN EMBEDDED DIE
- Patent Title (中): 多层基底与嵌入式DIE
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Application No.: US15133995Application Date: 2016-04-20
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Publication No.: US20170025358A1Publication Date: 2017-01-26
- Inventor: Bryan McChesney , John Avery Capwell , Mark Alan Crandall
- Applicant: RF Micro Devices, Inc.
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L23/00

Abstract:
The present disclosure relates to a multi-layer substrate structure with an embedded die to miniaturize designs and improve performance. The multi-layer substrate structure includes a core layer having a cavity and a die mounted within the cavity. The die has a die body, a die conductive element on a top surface of the die body, and a dielectric layer over the die conductive element. The multi-layer substrate structure also includes a substrate conductive element formed over a portion of a top surface of the core layer and extending over at least a portion of the die conductive element. Overlapping portions of the die conductive element and the substrate conductive element are separated by the dielectric layer and form an electronic component.
Public/Granted literature
- US09711459B2 Multi-layer substrate with an embedded die Public/Granted day:2017-07-18
Information query
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