Invention Application
- Patent Title: METHOD AND ASSOCIATED INTERFACE CIRCUIT FOR MITIGATING INTERFERENCE DUE TO SIGNALING OF A BUS
- Patent Title (中): 用于减少总线信号干扰的方法和相关接口电路
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Application No.: US15185060Application Date: 2016-06-17
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Publication No.: US20170046302A1Publication Date: 2017-02-16
- Inventor: Ming-Pei Chen , Chuing-Nien Tseng , Juei-Ting Sun , Kuo-Chieh Wang
- Applicant: MEDIATEK Inc.
- Main IPC: G06F13/42
- IPC: G06F13/42 ; G06F13/40

Abstract:
The present invention provides method and associated interface circuit for mitigating interference due to signaling of a bus between two electronic apparatuses. The method may include: via the bus mechanically compliant to a bus specification, communicating and transporting data at a nonstandard speed which is not compliant to the bus specification. The method may further include: before communicating and transporting data at the nonstandard speed, signaling via the bus at a standard speed to configure a speed switching from the standard speed to the nonstandard speed, with the standard speed compliant to the bus specification. For example, the bus specification may be USB specification, the standard speed may be 5 Gbps (SuperSpeed of USB 3.0 specification), and the nonstandard speed may be lower than the standard speed, e.g., 2.5 Gbps, which forms a spectrum notch at a frequency of wireless connection, e.g., 2.4 GHz of Wi-Fi.
Public/Granted literature
- US10275387B2 Method and associated interface circuit for mitigating interference due to signaling of a bus Public/Granted day:2019-04-30
Information query