Invention Application
- Patent Title: SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
- Patent Title (中): 半导体器件及其制造方法
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Application No.: US15176146Application Date: 2016-06-07
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Publication No.: US20170047403A1Publication Date: 2017-02-16
- Inventor: Hidekazu ODA
- Applicant: Renesas Electronics Corporation
- Priority: JP2015-158206 20150810
- Main IPC: H01L29/08
- IPC: H01L29/08 ; H01L29/45 ; H01L29/04 ; H01L29/66 ; H01L21/762 ; H01L21/02 ; H01L29/06 ; H01L29/78
Abstract:
An element isolation portion includes a projection portion that projects from an SOI substrate and comes into contact with a piled-up layer. The height of the upper surface of the projection portion is configured to be lower than or equal to the height of the upper surface of the piled-up layer and higher than or equal to a half of the height of the upper surface of the piled-up layer with reference to a surface of a silicon layer of the SOI substrate.
Information query
IPC分类:
