Invention Application
US20170060681A1 Memory device error check and scrub mode and error transparency
审中-公开
内存设备错误检查和擦除模式以及错误透明度
- Patent Title: Memory device error check and scrub mode and error transparency
- Patent Title (中): 内存设备错误检查和擦除模式以及错误透明度
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Application No.: US14998184Application Date: 2015-12-26
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Publication No.: US20170060681A1Publication Date: 2017-03-02
- Inventor: John B. Halbert , Kuljit S. Bains
- Applicant: Intel Corporation
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G06F3/06 ; G11C29/52

Abstract:
An error check and scrub (ECS) mode enables a memory device to perform error checking and correction (ECC) and count errors. An associated memory controller triggers the ECS mode with a trigger sent to the memory device. The memory device includes multiple addressable memory locations, which can be organized in segments such as wordlines. The memory locations store data and have associated ECC information. In the ECS mode, the memory device reads one or more memory locations and performs ECC for the one or more memory locations based on the ECC information. The memory device counts error information including a segment count indicating a number of segments having at least a threshold number of errors, and a maximum count indicating a maximum number of errors in any segment.
Public/Granted literature
- US10127101B2 Memory device error check and scrub mode and error transparency Public/Granted day:2018-11-13
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