Invention Application
US20170069661A1 METHOD FOR MANUFACTURING A TRANSISTOR HAVING A SHARP JUNCTION BY FORMING RAISED SOURCE-DRAIN REGIONS BEFORE FORMING GATE REGIONS AND CORRESPONDING TRANSISTOR PRODUCED BY SAID METHOD
有权
通过在形成栅格区域之前形成提高的源区域和通过公式生成的相应晶体管制造具有夏普结的晶体管的方法
- Patent Title: METHOD FOR MANUFACTURING A TRANSISTOR HAVING A SHARP JUNCTION BY FORMING RAISED SOURCE-DRAIN REGIONS BEFORE FORMING GATE REGIONS AND CORRESPONDING TRANSISTOR PRODUCED BY SAID METHOD
- Patent Title (中): 通过在形成栅格区域之前形成提高的源区域和通过公式生成的相应晶体管制造具有夏普结的晶体管的方法
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Application No.: US14887814Application Date: 2015-10-20
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Publication No.: US20170069661A1Publication Date: 2017-03-09
- Inventor: John Hongguang Zhang
- Applicant: STMicroelectronics, Inc.
- Applicant Address: US TX Coppell
- Assignee: STMicroelectronics, Inc.
- Current Assignee: STMicroelectronics, Inc.
- Current Assignee Address: US TX Coppell
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L29/06 ; H01L21/762 ; H01L21/84 ; H01L29/161 ; H01L29/20 ; H01L29/66 ; H01L29/08 ; H01L21/02
Abstract:
A transistor device is fabricated by growing an epitaxial layer of semiconductor material on a semiconductor layer and forming an opening extending through the epitaxial layer at a position where a gate is to be located. This opening provides, from the epitaxial layer, a source epitaxial region on one side of the opening and a drain epitaxial region on an opposite side of the opening. The source epitaxial region and a first portion of the semiconductor layer underlying the source epitaxial region are then converted into a transistor source region. Additionally, the drain epitaxial region and a second portion of the semiconductor layer underlying the drain epitaxial region are converted into a transistor drain region. A third portion of the semiconductor layer between the transistor source and drain regions forms a transistor channel region. A transistor gate electrode is then formed in the opening above the transistor channel region.
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