A system and method of hardware multithreading in VLIW DSPs includes an instruction fetch and dispatch unit, a plurality of program control units coupled to the instruction fetch and dispatch unit, a plurality of function units coupled to the plurality of program control units, and a mode control unit coupled to the function units and the program control units, the mode control unit configured to dynamically organize the plurality of function units and the plurality of program control units into one or more threads, each thread comprising a program control of the plurality of program control units and a subset of the plurality of function units.