- 专利标题: SEMICONDUCTOR DEVICE WITH BOND PAD WIRING LEAD-OUT ARRANGEMENT AVOIDING BOND PAD PROBE MARK AREA
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申请号: US15494501申请日: 2017-04-22
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公开(公告)号: US20170229359A1公开(公告)日: 2017-08-10
- 发明人: Toshihiko Akiba , Bunji Yasumura , Masanao Sato , Hiromi Abe
- 申请人: Renesas Electronics Corporation
- 优先权: JP2008-092633 20080331
- 主分类号: H01L21/66
- IPC分类号: H01L21/66 ; H01L23/00
摘要:
Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.
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