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公开(公告)号:US20160336244A1
公开(公告)日:2016-11-17
申请号:US15219254
申请日:2016-07-25
发明人: Toshihiko Akiba , Bunji Yasumura , Masanao Sato , Hiromi Abe
CPC分类号: H01L22/32 , G01R31/26 , H01L22/14 , H01L22/20 , H01L22/30 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/12 , H01L24/13 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L2224/02166 , H01L2224/02313 , H01L2224/02371 , H01L2224/02373 , H01L2224/02381 , H01L2224/0392 , H01L2224/0401 , H01L2224/04042 , H01L2224/05012 , H01L2224/05073 , H01L2224/05082 , H01L2224/05187 , H01L2224/05552 , H01L2224/05553 , H01L2224/05554 , H01L2224/05555 , H01L2224/05558 , H01L2224/05624 , H01L2224/05644 , H01L2224/0603 , H01L2224/06133 , H01L2224/06135 , H01L2224/10 , H01L2224/1132 , H01L2224/11334 , H01L2224/13099 , H01L2224/13144 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/4813 , H01L2224/48145 , H01L2224/48227 , H01L2224/48465 , H01L2224/4847 , H01L2224/48624 , H01L2224/48644 , H01L2224/48724 , H01L2224/4911 , H01L2224/49429 , H01L2224/49431 , H01L2224/73204 , H01L2224/73265 , H01L2224/85951 , H01L2225/0651 , H01L2225/06517 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/014 , H01L2924/05042 , H01L2924/10329 , H01L2924/12041 , H01L2924/1306 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/00014 , H01L2924/04941 , H01L2924/04953 , H01L2924/00 , H01L2224/48744 , H01L2924/00012
摘要: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.
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公开(公告)号:US10141295B2
公开(公告)日:2018-11-27
申请号:US15730977
申请日:2017-10-12
发明人: Bunji Yasumura , Yoshinori Deguchi , Fumikazu Takei , Akio Hasebe , Naohiro Makihira , Mitsuyuki Kubo
IPC分类号: H01L21/30 , H01L25/00 , H01L21/683 , H01L23/00 , H01L21/66 , H01L23/544 , H01L25/065 , H01L25/18
摘要: To improve the assemblability of a semiconductor device.When a memory chip is mounted over a logic chip, a recognition range including a recognition mark formed at a back surface of the logic chip is imaged and a shape of the recognition range is recognized, alignment of a plurality of bumps of the logic chip and a plurality of projection electrodes of the above-described memory chip is performed based on a result of the recognition, and the above-described memory chip is mounted over the logic chip. At this time, the shape of the recognition range is different from any portion of an array shape of the bumps, as a result, the recognition mark in the shape of the recognition range can be reliably recognized, and alignment of the bumps of the logic chip and the projection electrodes of the above-described memory chip is performed with high accuracy.
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公开(公告)号:US20150137125A1
公开(公告)日:2015-05-21
申请号:US14589547
申请日:2015-01-05
发明人: Bunji Yasumura , Fumio Tsuchiya , Hisanori Ito , Takuji Ide , Naoki Kawanabe , Masanao Sato
CPC分类号: H01L22/32 , H01L23/3114 , H01L23/49816 , H01L23/49838 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/85 , H01L2224/02166 , H01L2224/0401 , H01L2224/04042 , H01L2224/05073 , H01L2224/05553 , H01L2224/05624 , H01L2224/0613 , H01L2224/13099 , H01L2224/131 , H01L2224/16225 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48157 , H01L2224/48227 , H01L2224/4845 , H01L2224/48463 , H01L2224/48465 , H01L2224/48624 , H01L2224/49171 , H01L2224/73265 , H01L2224/85203 , H01L2224/85205 , H01L2224/85207 , H01L2224/85399 , H01L2924/00012 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01025 , H01L2924/01033 , H01L2924/0105 , H01L2924/01051 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/014 , H01L2924/04941 , H01L2924/05042 , H01L2924/10253 , H01L2924/12041 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/20752 , H01L2924/20753 , H01L2924/30107 , H01L2924/3512 , H01L2924/00
摘要: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.
摘要翻译: 提供了能够防止半导体装置的最上层的保护膜的破裂的技术,提高了半导体装置的可靠性。 在半导体芯片的主表面上形成的接合焊盘为矩形,并且在每个接合焊盘上的保护膜中形成开口,使得保护膜在每个接合的引线接合区域中的重叠宽度 衬垫比每个焊盘的探针区域中的保护膜的重叠宽度宽。
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公开(公告)号:US08945953B2
公开(公告)日:2015-02-03
申请号:US14133614
申请日:2013-12-18
发明人: Akio Hasebe , Naohiro Makihira , Bunji Yasumura , Mitsuyuki Kubo , Fumikazu Takei , Yoshinori Deguchi
IPC分类号: H01L21/66
CPC分类号: H01L24/89 , H01L21/6835 , H01L21/6836 , H01L21/76898 , H01L21/78 , H01L22/14 , H01L23/481 , H01L23/49816 , H01L23/50 , H01L23/5226 , H01L24/05 , H01L24/09 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L25/0657 , H01L25/18 , H01L2221/68327 , H01L2221/6834 , H01L2221/68368 , H01L2224/0401 , H01L2224/05025 , H01L2224/05568 , H01L2224/05624 , H01L2224/08235 , H01L2224/1146 , H01L2224/13023 , H01L2224/13025 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/16146 , H01L2224/16148 , H01L2224/16225 , H01L2224/16227 , H01L2224/17181 , H01L2224/73204 , H01L2224/8036 , H01L2224/8085 , H01L2224/81801 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/381 , H01L2924/00014 , H01L2924/014 , H01L2924/00 , H01L2924/00012
摘要: Provided is a method of manufacturing a semiconductor device including a step of testing every one of through-electrodes. A second probe test is conducted to check an electrical coupling state between a plurality of copper post bumps formed on the side of the surface of a wafer and electrically coupled to a metal layer and a plurality of bumps formed on the side of the back surface of the wafer and electrically coupled to the metal layer (also another metal layer) via a plurality of through-electrodes by probing to each of the bumps on the side of the back surface while short-circuiting between the copper post bumps (electrodes). By this test, conduction between the bumps (electrodes) on the back surface side is checked.
摘要翻译: 提供了一种制造半导体器件的方法,该半导体器件包括测试每个通孔的步骤。 进行第二探针测试以检查形成在晶片表面一侧的多个铜柱形凸块之间的电耦合状态,并且电耦合到金属层和形成在背面侧的多个凸点 并且通过探测背面一侧的每个凸块,同时在铜柱凸起(电极)之间短路,通过多个通孔电耦合到金属层(也是另一金属层)。 通过该测试,检查背面侧的凸块(电极)之间的导通。
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公开(公告)号:US20190057913A1
公开(公告)日:2019-02-21
申请号:US16167492
申请日:2018-10-22
发明人: Toshihiko Akiba , Bunji Yasumura , Masanao Sato , Hiromi Abe
IPC分类号: H01L21/66 , H01L25/065 , H01L23/00 , G01R31/26
摘要: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.
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6.
公开(公告)号:US09911673B2
公开(公告)日:2018-03-06
申请号:US15494501
申请日:2017-04-22
发明人: Toshihiko Akiba , Bunji Yasumura , Masanao Sato , Hiromi Abe
CPC分类号: H01L22/32 , G01R31/26 , H01L22/14 , H01L22/20 , H01L22/30 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/12 , H01L24/13 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L2224/02166 , H01L2224/02313 , H01L2224/02371 , H01L2224/02373 , H01L2224/02381 , H01L2224/0392 , H01L2224/0401 , H01L2224/04042 , H01L2224/05012 , H01L2224/05073 , H01L2224/05082 , H01L2224/05187 , H01L2224/05552 , H01L2224/05553 , H01L2224/05554 , H01L2224/05555 , H01L2224/05558 , H01L2224/05624 , H01L2224/05644 , H01L2224/0603 , H01L2224/06133 , H01L2224/06135 , H01L2224/10 , H01L2224/1132 , H01L2224/11334 , H01L2224/13099 , H01L2224/13144 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/4813 , H01L2224/48145 , H01L2224/48227 , H01L2224/48465 , H01L2224/4847 , H01L2224/48624 , H01L2224/48644 , H01L2224/48724 , H01L2224/4911 , H01L2224/49429 , H01L2224/49431 , H01L2224/73204 , H01L2224/73265 , H01L2224/85951 , H01L2225/0651 , H01L2225/06517 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/014 , H01L2924/05042 , H01L2924/10329 , H01L2924/12041 , H01L2924/1306 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/00014 , H01L2924/04941 , H01L2924/04953 , H01L2924/00 , H01L2224/48744 , H01L2924/00012
摘要: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.
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公开(公告)号:US09165845B2
公开(公告)日:2015-10-20
申请号:US14465975
申请日:2014-08-22
发明人: Toshihiko Akiba , Bunji Yasumura , Masanao Sato , Hiromi Abe
IPC分类号: H01L21/66 , H01L23/00 , H01L25/065 , G01R31/26
CPC分类号: H01L22/32 , G01R31/26 , H01L22/14 , H01L22/20 , H01L22/30 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/12 , H01L24/13 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L2224/02166 , H01L2224/02313 , H01L2224/02371 , H01L2224/02373 , H01L2224/02381 , H01L2224/0392 , H01L2224/0401 , H01L2224/04042 , H01L2224/05012 , H01L2224/05073 , H01L2224/05082 , H01L2224/05187 , H01L2224/05552 , H01L2224/05553 , H01L2224/05554 , H01L2224/05555 , H01L2224/05558 , H01L2224/05624 , H01L2224/05644 , H01L2224/0603 , H01L2224/06133 , H01L2224/06135 , H01L2224/10 , H01L2224/1132 , H01L2224/11334 , H01L2224/13099 , H01L2224/13144 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/4813 , H01L2224/48145 , H01L2224/48227 , H01L2224/48465 , H01L2224/4847 , H01L2224/48624 , H01L2224/48644 , H01L2224/48724 , H01L2224/4911 , H01L2224/49429 , H01L2224/49431 , H01L2224/73204 , H01L2224/73265 , H01L2224/85951 , H01L2225/0651 , H01L2225/06517 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/014 , H01L2924/05042 , H01L2924/10329 , H01L2924/12041 , H01L2924/1306 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/00014 , H01L2924/04941 , H01L2924/04953 , H01L2924/00 , H01L2224/48744 , H01L2924/00012
摘要: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.
摘要翻译: 提供了一种在半导体芯片上具有焊盘的半导体器件,形成在半导体芯片上并且在探针区域的焊盘上的开口部分和耦合区域的第一钝化膜,形成在焊盘上的第二钝化膜和第一钝化膜 钝化膜并且在耦合区域的焊盘上具有开口部分,以及重新布线层,形成在耦合区域和第二钝化膜上并电耦合到焊盘。 相对于耦合区域放置在半导体芯片的周边侧的探针区域的焊盘具有探针标记,并且重新布线层从半导体芯片的耦合区域延伸到中心侧。 本发明提供能够实现半导体器件的尺寸减小,特别是间距变窄的技术。
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公开(公告)号:US10566255B2
公开(公告)日:2020-02-18
申请号:US16519150
申请日:2019-07-23
发明人: Toshihiko Akiba , Bunji Yasumura , Masanao Sato , Hiromi Abe
IPC分类号: H01L23/00 , H01L21/66 , G01R31/26 , H01L25/065
摘要: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.
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公开(公告)号:US10163740B2
公开(公告)日:2018-12-25
申请号:US15785531
申请日:2017-10-17
发明人: Bunji Yasumura , Fumio Tsuchiya , Hisanori Ito , Takuji Ide , Naoki Kawanabe , Masanao Sato
IPC分类号: H01L21/66 , H01L23/00 , H01L23/31 , H01L23/498
摘要: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.
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10.
公开(公告)号:US20170229359A1
公开(公告)日:2017-08-10
申请号:US15494501
申请日:2017-04-22
发明人: Toshihiko Akiba , Bunji Yasumura , Masanao Sato , Hiromi Abe
CPC分类号: H01L22/32 , G01R31/26 , H01L22/14 , H01L22/20 , H01L22/30 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/12 , H01L24/13 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L2224/02166 , H01L2224/02313 , H01L2224/02371 , H01L2224/02373 , H01L2224/02381 , H01L2224/0392 , H01L2224/0401 , H01L2224/04042 , H01L2224/05012 , H01L2224/05073 , H01L2224/05082 , H01L2224/05187 , H01L2224/05552 , H01L2224/05553 , H01L2224/05554 , H01L2224/05555 , H01L2224/05558 , H01L2224/05624 , H01L2224/05644 , H01L2224/0603 , H01L2224/06133 , H01L2224/06135 , H01L2224/10 , H01L2224/1132 , H01L2224/11334 , H01L2224/13099 , H01L2224/13144 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/4813 , H01L2224/48145 , H01L2224/48227 , H01L2224/48465 , H01L2224/4847 , H01L2224/48624 , H01L2224/48644 , H01L2224/48724 , H01L2224/4911 , H01L2224/49429 , H01L2224/49431 , H01L2224/73204 , H01L2224/73265 , H01L2224/85951 , H01L2225/0651 , H01L2225/06517 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/014 , H01L2924/05042 , H01L2924/10329 , H01L2924/12041 , H01L2924/1306 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/00014 , H01L2924/04941 , H01L2924/04953 , H01L2924/00 , H01L2224/48744 , H01L2924/00012
摘要: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.
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