Aspects of the present disclosure include methods and test structures for an intermediate metal level of an integrated circuit (IC). A method according to the present disclosure can include: fabricating a first plurality of metal levels including an intermediate metal level of an IC structure, the intermediate metal level being one of a plurality of metal levels in the IC structure other than a capping metal level of the IC structure; performing a first functional test on a first circuit positioned within the intermediate metal level; fabricating a second plurality of metal levels after performing the first functional test, the second plurality of metal levels including the capping metal level of the IC structure; and performing a second functional test on a second circuit positioned within the plurality of metal levels, after the fabricating of the capping metal level.