Invention Application
- Patent Title: SEMICONDUCTOR DEVICE AND A METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
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Application No.: US15632663Application Date: 2017-06-26
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Publication No.: US20170294538A1Publication Date: 2017-10-12
- Inventor: Tatsuo NAKAYAMA , Hironobu MIYAMOTO , Ichiro MASUMOTO , Yasuhiro OKAMOTO , Shinichi MIYAKE , Hiroshi KAWAGUCHI
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Priority: JP2014-176367 20140829
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/423 ; H01L29/20

Abstract:
The characteristics of a semiconductor device are improved. A semiconductor device has a potential fixed layer containing a p type impurity, a channel layer, and a barrier layer, formed over a substrate, and a gate electrode arranged in a trench penetrating through the barrier layer, and reaching some point of the channel layer via a gate insulation film. Source and drain electrodes are formed on opposite sides of the gate electrode. The p type impurity-containing potential fixed layer has an inactivated region containing an inactivating element such as hydrogen between the gate and drain electrodes. Thus, while raising the p type impurity (acceptor) concentration of the potential fixed layer on the source electrode side, the p type impurity of the potential fixed layer is inactivated on the drain electrode side. This can improve the drain-side breakdown voltage while providing a removing effect of electric charges by the p type impurity.
Public/Granted literature
- US09831339B2 Semiconductor device and a method for manufacturing a semiconductor device Public/Granted day:2017-11-28
Information query
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