An embodiment of a semiconductor device comprises a transistor cell array in a semiconductor body. The transistor cell array comprises transistor cell units. Each of the transistor cell units comprises a control terminal and first and second load terminals, respectively. The transistor cell units are electrically connected in parallel, and the control terminals of the transistor cells units are electrically connected. A first group of the transistor cell units includes a first threshold voltage. A second group of the transistor cell units includes a second threshold voltage larger than the first threshold voltage. A channel width of a transistor cell unit of the first group is smaller than a channel width of a transistor cell unit of the second group.