- 专利标题: ADVANCED THROUGH SUBSTRATE VIA METALLIZATION IN THREE DIMENSIONAL SEMICONDUCTOR INTEGRATION
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申请号: US15289187申请日: 2016-10-09
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公开(公告)号: US20170345739A1公开(公告)日: 2017-11-30
- 发明人: Daniel C. Edelstein , Chih-Chao Yang
- 申请人: International Business Machines Corporation
- 主分类号: H01L23/48
- IPC分类号: H01L23/48 ; H01L21/822 ; H01L21/768 ; H01L27/06 ; H01L23/532
摘要:
An advanced through silicon via structure for is described. The device includes a substrate including integrated circuit devices. A high aspect ratio through substrate via is disposed in the substrate. The through substrate via has vertical sidewalls and a horizontal bottom. The substrate has a horizontal field area surrounding the through substrate via. A metallic barrier layer is disposed on the sidewalls of the through substrate via. A surface portion of the metallic barrier layer has been converted to a nitride surface layer by a nitridation process. The nitride surface layer enhances the nucleation of subsequent depositions. A first metal layer fills the through substrate via and has a recess in an upper portion. A second barrier layer is disposed over the recess. A second metal layer is disposed over the second barrier layer and creates a contact.
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