Invention Application
- Patent Title: ANTI-FUSES WITH REDUCED PROGRAMMING VOLTAGES
-
Application No.: US15189432Application Date: 2016-06-22
-
Publication No.: US20170373005A1Publication Date: 2017-12-28
- Inventor: Chengwen Pei , Kangguo Cheng , Juntao Li , Geng Wang
- Applicant: GLOBALFOUNDRIES Inc.
- Main IPC: H01L23/525
- IPC: H01L23/525 ; H01L29/06 ; H01L21/265 ; H01L27/112 ; H01L29/78 ; H01L29/66

Abstract:
Device structures for an anti-fuse and methods for manufacturing device structures for an anti-fuse. The anti-fuse includes a first terminal comprised of a fin. The fin includes a section with an edge and inclined surfaces that intersect at the edge. The anti-fuse further includes a second terminal covering the edge and the inclined surfaces of the fin, and an isolation dielectric layer on the inclined surfaces and the edge of the fin. The second terminal is separated from the edge and inclined surfaces of the fin by the isolation dielectric layer. The edge and inclined surfaces on the firm may be formed by oxidizing an upper section of the fin in a trench to form an oxide layer, and then removing the oxide layer to expose the edge and inclined surfaces.
Public/Granted literature
- US09852982B1 Anti-fuses with reduced programming voltages Public/Granted day:2017-12-26
Information query
IPC分类: