Invention Application
- Patent Title: METHOD TO MITIGATE CHIP PACKAGE INTERACTION RISK ON DIE CORNER USING REINFORCING TILES
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Application No.: US15193700Application Date: 2016-06-27
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Publication No.: US20170373019A1Publication Date: 2017-12-28
- Inventor: Mohamed RABIE
- Applicant: GLOBALFOUNDRIES Inc.
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/498
Abstract:
A method for producing semiconductor devices including reinforcing metal tiles and the resulting semiconductor package are provided. Embodiments include forming one or more reinforcing metal tiles at corners of an upper portion of a metal stack of semiconductor die during manufacturing of the semiconductor die; and attaching the semiconductor die to a packaging substrate.
Information query
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