Invention Application
- Patent Title: INTEGRATED CIRCUITS
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Application No.: US15541986Application Date: 2015-01-29
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Publication No.: US20180012900A1Publication Date: 2018-01-11
- Inventor: Wai Mun Wong , Leong Yap Chia , Ning Ge
- Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
- Applicant Address: US TX Houston
- Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
- Current Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
- Current Assignee Address: US TX Houston
- International Application: PCT/US2015/013431 WO 20150129
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
The present subject matter relates to an integrated circuit comprising an erasable programmable read only memory (EPROM) array having a plurality of EPROM cells disposed in rows and columns, wherein one or more EPROM cells located at predetermined positions in the EPROM array are selectively dischargeable. The one or more EPROM cells comprise a EPROM transistor having a first conductive layer to store electrons upon the EPROM transistor being programmed and a control metal oxide semiconductor field-effect transistor (MOSFET) electrically connected to the first conductive layer to provide an electron leakage path to dissipate the electrons stored in the first conductive layer in a predetermined leak time period.
Public/Granted literature
- US10224335B2 Integrated circuits Public/Granted day:2019-03-05
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