Invention Application
- Patent Title: Power Saving with Dual-rail Supply Voltage Scheme
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Application No.: US15201739Application Date: 2016-07-05
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Publication No.: US20180013432A1Publication Date: 2018-01-11
- Inventor: Edgardo F. Klass
- Applicant: Apple Inc.
- Main IPC: H03K19/00
- IPC: H03K19/00 ; G06F1/10 ; H03K19/0185 ; H03K19/177

Abstract:
In an embodiment, an integrated circuit includes a clock tree circuit and logic circuitry that is clocked by the clocks received from the clock tree circuit. The logic circuit is powered by a first power supply voltage. The integrated circuit includes a voltage regulator that receives the first power supply voltage and generates a second power supply voltage having a magnitude that is lower than the magnitude of the first power supply voltage by a predetermined amount. The second power supply voltage may track the first power supply voltage over dynamic changes during use, either intentional changes to operating state or noise-induced changes. The second power supply voltage may be used to power at least a portion of the clock tree.
Public/Granted literature
- US09973191B2 Power saving with dual-rail supply voltage scheme Public/Granted day:2018-05-15
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