Invention Application
- Patent Title: ERROR CORRECTION AND DECODING
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Application No.: US15716451Application Date: 2017-09-26
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Publication No.: US20180019767A1Publication Date: 2018-01-18
- Inventor: Seong-Ook JUNG , Sara CHOI , Byung Kyu SONG, JR. , Taehui NA , Jisu KIM , Jung Pill KIM , Sungryul KIM , Taehyun KIM , Seung Hyuk KANG
- Applicant: QUALCOMM Incorporated
- Main IPC: H03M13/00
- IPC: H03M13/00 ; H03M13/15 ; G06F11/10

Abstract:
Error detection and correction decoding apparatus performs single error correction-double error detection (SEC-DED) or double error correction-triple error detection (DEC-TED) depending on whether the data input contains a single-bit error or a multiple-bit error, to reduce power consumption and latency in case of single-bit errors and to provide powerful error correction in case of multiple-bit errors.
Public/Granted literature
- US10263645B2 Error correction and decoding Public/Granted day:2019-04-16
Information query
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