Invention Application
- Patent Title: MEMORY MIRRORING
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Application No.: US15783177Application Date: 2017-10-13
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Publication No.: US20180089035A1Publication Date: 2018-03-29
- Inventor: Steven Woo , David A. Secker , Ravindranath Kollipara
- Applicant: Rambus Inc.
- Main IPC: G06F11/14
- IPC: G06F11/14 ; G06F11/16

Abstract:
Described is memory system enabling memory minoring in single write operations for the primary and backup data storage. The memory system utilizes a memory channel including one or more latency groups, with each latency group encompassing a number of memory modules that have the same signal timing to the controller. A primary copy and a backup copy of a data element can be written to two memory modules in the same latency group of the channel and in a single write operation. The buses of the channel may have the same trace length to each of the memory modules within a latency group.
Public/Granted literature
- US10437685B2 Memory mirroring Public/Granted day:2019-10-08
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