Invention Application
- Patent Title: EVICTION CONTROL FOR AN ADDRESS TRANSLATION CACHE
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Application No.: US15294031Application Date: 2016-10-14
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Publication No.: US20180107606A1Publication Date: 2018-04-19
- Inventor: Barry Duane WILLIAMSON , Michael FILIPPO , . ABHISHEK RAJA , Adrian MONTERO , Miles Robert DOOLEY
- Applicant: ARM LIMITED
- Main IPC: G06F12/1045
- IPC: G06F12/1045 ; G06F12/128 ; G06F12/1009

Abstract:
A data processing system 2 includes an address translation cache 12 to store a plurality of address translation entries. Eviction control circuitry 10 selects a victim entry for eviction from address translation cache 12 using an eviction control parameter. The address translation cache 12 can store multiple different types of entry corresponding to respective different levels of address translation within a multiple-level page table walk. The different types of entry have different eviction control parameters assigned at the time of allocation. Eviction from the address translation cache is dependent upon the entry type, as well as the subsequent accesses to the entry concerned and the other entries within the address translation cache.
Public/Granted literature
- US10102143B2 Eviction control for an address translation cache Public/Granted day:2018-10-16
Information query
IPC分类: