- 专利标题: MULTIPLE LOW DENSITY PARITY CHECK (LDPC) BASE GRAPH DESIGN
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申请号: US15943624申请日: 2018-04-02
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公开(公告)号: US20180226989A1公开(公告)日: 2018-08-09
- 发明人: Joseph Binamira Soriaga , Gabi Sarkis , Shrinivas Kudekar , Thomas Richardson , Vincent Loncke
- 申请人: QUALCOMM Incorporated
- 主分类号: H03M13/11
- IPC分类号: H03M13/11 ; H03M13/00
摘要:
Aspects of the present disclosure relate to low density parity check (LDPC) coding utilizing LDPC base graphs. Two or more LDPC base graphs may be maintained that are associated with different ranges of overlapping information block lengths. A particular LDPC base graph may be selected for an information block based on the information block length of the information block. Additional metrics that may be considered when selecting the LDPC base graph may include the code rate utilized to encode the information block and/or the lift size applied to each LDPC base graph to produce the information block length of the information block.
公开/授权文献
- US10560118B2 Multiple low density parity check (LDPC) base graph design 公开/授权日:2020-02-11
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