Invention Application
- Patent Title: TRANSLATE FURTHER MECHANISM
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Application No.: US15486745Application Date: 2017-04-13
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Publication No.: US20180300253A1Publication Date: 2018-10-18
- Inventor: Wade K. Smith , Anthony Asaro , Dhirendra Partap Singh Rana
- Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
- Main IPC: G06F12/1009
- IPC: G06F12/1009 ; G06F12/1027

Abstract:
Systems, apparatuses, and methods for implementing a translate further mechanism are disclosed herein. In one embodiment, a processor detects a hit to a first entry of a page table structure during a first lookup to the page table structure. The processor retrieves a page table entry address from the first entry and uses this address to perform a second lookup to the page table structure responsive to detecting a first indication in the first entry. The processor retrieves a physical address from the first entry and uses the physical address to access the memory subsystem responsive to not detecting the first indication in the first entry. In one embodiment, the first indication is a translate further bit being set. In another embodiment, the first indication is a page directory entry as page table entry field not being activated.
Information query
IPC分类: