Invention Application
- Patent Title: FACILTATING MULTI-LEVEL MICROCONTROLLER SCHEDULING FOR EFFICIENT COMPUTING MICROARCHITECTURE
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Application No.: US15493698Application Date: 2017-04-21
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Publication No.: US20180307533A1Publication Date: 2018-10-25
- Inventor: Kun Tian , David J. Cowperthwaite , Murali Ramadoss , Balaji Vembu , Zhi Wang , Eric C. Samson , Altug Koker , Abhishek R. Appu , Joydeep Ray
- Applicant: Intel Corporation
- Main IPC: G06F9/48
- IPC: G06F9/48 ; G06T1/20
Abstract:
A mechanism is described for facilitating multi-level scheduling of workloads in computing devices. A method of embodiments, as described herein, includes facilitating multiple levels of scheduling for processing of workloads using multiple levels of queues, where the workloads are associated with a device including a processor of a computing device.
Information query
