公开(公告)号：US12118756B2

公开(公告)日：2024-10-15

申请号：US17845039

申请日：2022-06-21

申请人： Intel Corporation

发明人： Abhishek R. Appu ,  Kiran C. Veernapu ,  Prasoonkumar Surti ,  Joydeep Ray ,  Altug Koker ,  Eric G. Liskay

IPC分类号： G06T9/00

CPC分类号： G06T9/00

摘要： A mechanism is described for facilitating smart compression/decompression schemes at computing devices. A method of embodiments, as described herein, includes unifying a first compression scheme relating to three-dimensional (3D) content and a second compression scheme relating to media content into a unified compression scheme to perform compression of one or more of the 3D content and the media content relating to a processor including a graphics processor.

公开(公告)号：US12108239B2

公开(公告)日：2024-10-01

申请号：US17816960

申请日：2022-08-02

申请人： Intel Corporation

发明人： Joydeep Ray ,  Travis T. Schluessler ,  Prasoonkumar Surti ,  John H. Feit ,  Nikos Kaburlasos ,  Jacek Kwiatkowski ,  Abhishek R. Appu ,  James M. Holland ,  Jeffery S. Boles ,  Jonathan Kennedy ,  Louis Feng ,  Atsuo Kuwahara ,  Barnan Das ,  Narayan Biswal ,  Stanley J. Baran ,  Gokcen Cilingir ,  Nilesh V. Shah ,  Archie Sharma ,  Mayuresh M. Varerkar

IPC分类号： G06T1/20 ,  G06F3/01 ,  G06T15/06 ,  G09B21/00 ,  H04R1/40 ,  H04R3/00 ,  H04S7/00

CPC分类号： H04S7/303 ,  G06F3/016 ,  G06T1/20 ,  G06T15/06 ,  G09B21/003 ,  G09B21/006 ,  G09B21/008 ,  H04R1/406 ,  H04R3/005 ,  H04S2400/11 ,  H04S2420/01

摘要： Systems, apparatuses and methods may provide away to render augmented reality (AR) and/or virtual reality (VR) sensory enhancements using ray tracing. More particularly, systems, apparatuses and methods may provide a way to normalize environment information captured by multiple capture devices, and calculate, for an observer, the sound sources or sensed events vector paths. The systems, apparatuses and methods may detect and/or manage one or more capture devices and assign one or more the capture devices based on one or more conditions to provide observer an immersive VR/AR experience.

公开(公告)号：US12100103B2

公开(公告)日：2024-09-24

申请号：US17390198

申请日：2021-07-30

申请人： Intel Corporation

发明人： Eric Hoekstra ,  Prasoonkumar Surti ,  Abhishek R. Appu ,  Subramaniam Maiyuran ,  Kalyan Bhiravabhatla

IPC分类号： G06T17/10 ,  G06T1/20 ,  G06T15/00 ,  G06T19/20

CPC分类号： G06T17/10 ,  G06T1/20 ,  G06T19/20 ,  G06T15/005 ,  G06T2219/2004

摘要： Methods, systems and apparatuses provide for graphics processor technology that generates attribute plane coefficients based on barycentric coefficients, wherein the attribute plane coefficients are generated on a per polygon basis, and interpolates one or more pixel attributes based on the attribute plane coefficients. In one example, the technology excludes the barycentric coefficients from one or more per pixel operations.

公开(公告)号：US20240256825A1

公开(公告)日：2024-08-01

申请号：US18435528

申请日：2024-02-07

申请人： Intel Corporation

发明人： Liwei Ma ,  Elmoustapha Ould-Ahmed-Vall ,  Barath Lakshmanan ,  Ben J. Ashbaugh ,  Jingyi Jin ,  Jeremy Bottleson ,  Mike B. Macpherson ,  Kevin Nealis ,  Dhawal Srivastava ,  Joydeep Ray ,  Ping T. Tang ,  Michael S. Strickland ,  Xiaoming Chen ,  Anbang Yao ,  Tatiana Shpeisman ,  Altug Koker ,  Abhishek R. Appu

IPC分类号： G06N3/04 ,  G06N3/044 ,  G06N3/045 ,  G06N3/063 ,  G06N3/082 ,  G06T1/20

CPC分类号： G06N3/04 ,  G06N3/063 ,  G06N3/082 ,  G06T1/20 ,  G06N3/044 ,  G06N3/045

摘要： A library of machine learning primitives is provided to optimize a machine learning model to improve the efficiency of inference operations. In one embodiment a trained convolutional neural network (CNN) model is processed into a trained CNN model via pruning, convolution window optimization, and quantization.

公开(公告)号：US20240256483A1

公开(公告)日：2024-08-01

申请号：US18415052

申请日：2024-01-17

申请人： Intel Corporation

发明人： Altug Koker ,  Varghese George ,  Aravindh Anantaraman ,  Valentin Andrei ,  Abhishek R. Appu ,  Niranjan Cooray ,  Nicolas Galoppo Von Borries ,  Mike MacPherson ,  Subramaniam Maiyuran ,  ElMoustapha Ould-Ahmed-Vall ,  David Puffer ,  Vasanth Ranganathan ,  Joydeep Ray ,  Ankur N. Shah ,  Lakshminarayanan Striramassarma ,  Prasoonkumar Surti ,  Saurabh Tangri

IPC分类号： G06F15/78 ,  G06F7/544 ,  G06F7/575 ,  G06F7/58 ,  G06F9/30 ,  G06F9/38 ,  G06F9/50 ,  G06F12/02 ,  G06F12/06 ,  G06F12/0802 ,  G06F12/0804 ,  G06F12/0811 ,  G06F12/0862 ,  G06F12/0866 ,  G06F12/0871 ,  G06F12/0875 ,  G06F12/0882 ,  G06F12/0888 ,  G06F12/0891 ,  G06F12/0893 ,  G06F12/0895 ,  G06F12/0897 ,  G06F12/1009 ,  G06F12/128 ,  G06F15/80 ,  G06F17/16 ,  G06F17/18 ,  G06T1/20 ,  G06T1/60 ,  H03M7/46 ,  G06N3/08 ,  G06T15/06

CPC分类号： G06F15/7839 ,  G06F7/5443 ,  G06F7/575 ,  G06F7/588 ,  G06F9/3001 ,  G06F9/30014 ,  G06F9/30036 ,  G06F9/3004 ,  G06F9/30043 ,  G06F9/30047 ,  G06F9/30065 ,  G06F9/30079 ,  G06F9/3887 ,  G06F9/5011 ,  G06F9/5077 ,  G06F12/0215 ,  G06F12/0238 ,  G06F12/0246 ,  G06F12/0607 ,  G06F12/0802 ,  G06F12/0804 ,  G06F12/0811 ,  G06F12/0862 ,  G06F12/0866 ,  G06F12/0871 ,  G06F12/0875 ,  G06F12/0882 ,  G06F12/0888 ,  G06F12/0891 ,  G06F12/0893 ,  G06F12/0895 ,  G06F12/0897 ,  G06F12/1009 ,  G06F12/128 ,  G06F15/8046 ,  G06F17/16 ,  G06F17/18 ,  G06T1/20 ,  G06T1/60 ,  H03M7/46 ,  G06F9/3802 ,  G06F9/3818 ,  G06F9/3867 ,  G06F2212/1008 ,  G06F2212/1021 ,  G06F2212/1044 ,  G06F2212/302 ,  G06F2212/401 ,  G06F2212/455 ,  G06F2212/60 ,  G06N3/08 ,  G06T15/06

摘要： Embodiments are generally directed to graphics processor data access and sharing. An embodiment of an apparatus includes a circuit element to produce a result in processing of an application; a load-store unit to receive the result and generate pre-fetch information for a cache utilizing the result; and a prefetch generator to produce prefetch addresses based at least in part on the pre-fetch information; wherein the load-store unit is to receive software assistance for prefetching, and wherein generation of the pre-fetch information is based at least in part on the software assistance.

公开(公告)号：US12001209B2

公开(公告)日：2024-06-04

申请号：US17750917

申请日：2022-05-23

申请人： Intel Corporation

发明人： Abhishek R. Appu ,  Altug Koker ,  Joydeep Ray ,  Balaji Vembu ,  John C. Weast ,  Mike B. Macpherson ,  Dukhwan Kim ,  Linda L. Hurd ,  Sanjeev Jahagirdar ,  Vasanth Ranganathan

IPC分类号： G06F9/48 ,  G05D1/00 ,  G06F9/52 ,  G06N3/04 ,  G06N3/044 ,  G06N3/045 ,  G06N3/063 ,  G06N3/08 ,  G06N3/084 ,  G06F9/46 ,  G06T1/20

CPC分类号： G05D1/0088 ,  G06F9/4881 ,  G06F9/522 ,  G06N3/044 ,  G06N3/045 ,  G06N3/063 ,  G06N3/084 ,  G06F9/46 ,  G06T1/20

摘要： A method of embodiments, as described herein, includes detecting thread groups relating to machine learning associated with one or more processing devices. The method may further include facilitating barrier synchronization of the thread groups across multiple dies such that each thread in a thread group is scheduled across a set of compute elements associated with the multiple dies, where each die represents a processing device of the one or more processing devices, the processing device including a graphics processor.

公开(公告)号：US11934342B2

公开(公告)日：2024-03-19

申请号：US17429277

申请日：2020-03-14

申请人： Intel Corporation

发明人： Altug Koker ,  Varghese George ,  Aravindh Anantaraman ,  Valentin Andrei ,  Abhishek R. Appu ,  Niranjan Cooray ,  Nicolas Galoppo Von Borries ,  Mike MacPherson ,  Subramaniam Maiyuran ,  ElMoustapha Ould-Ahmed-Vall ,  David Puffer ,  Vasanth Ranganathan ,  Joydeep Ray ,  Ankur N. Shah ,  Lakshminarayanan Striramassarma ,  Prasoonkumar Surti ,  Saurabh Tangri

IPC分类号： G06F15/78 ,  G06F7/544 ,  G06F7/575 ,  G06F7/58 ,  G06F9/30 ,  G06F9/38 ,  G06F9/50 ,  G06F12/02 ,  G06F12/06 ,  G06F12/0802 ,  G06F12/0804 ,  G06F12/0811 ,  G06F12/0862 ,  G06F12/0866 ,  G06F12/0871 ,  G06F12/0875 ,  G06F12/0882 ,  G06F12/0888 ,  G06F12/0891 ,  G06F12/0893 ,  G06F12/0895 ,  G06F12/0897 ,  G06F12/1009 ,  G06F12/128 ,  G06F15/80 ,  G06F17/16 ,  G06F17/18 ,  G06T1/20 ,  G06T1/60 ,  H03M7/46 ,  G06N3/08 ,  G06T15/06

CPC分类号： G06F15/7839 ,  G06F7/5443 ,  G06F7/575 ,  G06F7/588 ,  G06F9/3001 ,  G06F9/30014 ,  G06F9/30036 ,  G06F9/3004 ,  G06F9/30043 ,  G06F9/30047 ,  G06F9/30065 ,  G06F9/30079 ,  G06F9/3887 ,  G06F9/5011 ,  G06F9/5077 ,  G06F12/0215 ,  G06F12/0238 ,  G06F12/0246 ,  G06F12/0607 ,  G06F12/0802 ,  G06F12/0804 ,  G06F12/0811 ,  G06F12/0862 ,  G06F12/0866 ,  G06F12/0871 ,  G06F12/0875 ,  G06F12/0882 ,  G06F12/0888 ,  G06F12/0891 ,  G06F12/0893 ,  G06F12/0895 ,  G06F12/0897 ,  G06F12/1009 ,  G06F12/128 ,  G06F15/8046 ,  G06F17/16 ,  G06F17/18 ,  G06T1/20 ,  G06T1/60 ,  H03M7/46 ,  G06F9/3802 ,  G06F9/3818 ,  G06F9/3867 ,  G06F2212/1008 ,  G06F2212/1021 ,  G06F2212/1044 ,  G06F2212/302 ,  G06F2212/401 ,  G06F2212/455 ,  G06F2212/60 ,  G06N3/08 ,  G06T15/06

摘要： Embodiments are generally directed to graphics processor data access and sharing. An embodiment of an apparatus includes a circuit element to produce a result in processing of an application; a load-store unit to receive the result and generate pre-fetch information for a cache utilizing the result; and a prefetch generator to produce prefetch addresses based at least in part on the pre-fetch information; wherein the load-store unit is to receive software assistance for prefetching, and wherein generation of the pre-fetch information is based at least in part on the software assistance.

公开(公告)号：US11861759B2

公开(公告)日：2024-01-02

申请号：US17580352

申请日：2022-01-20

申请人： Intel Corporation

发明人： Joydeep Ray ,  Aravindh Anantaraman ,  Valentin Andrei ,  Abhishek R. Appu ,  Nicolas Galoppo von Borries ,  Varghese George ,  Altug Koker ,  Elmoustapha Ould-Ahmed-Vall ,  Mike Macpherson ,  Subramaniam Maiyuran

IPC分类号： G06T1/20 ,  G06F9/38 ,  G06T1/60 ,  G06T15/00

CPC分类号： G06T1/20 ,  G06F9/3802 ,  G06F9/3877 ,  G06T1/60 ,  G06T15/005

摘要： Embodiments are generally directed to memory prefetching in multiple GPU environment. An embodiment of an apparatus includes multiple processors including a host processor and multiple graphics processing units (GPUs) to process data, each of the GPUs including a prefetcher and a cache; and a memory for storage of data, the memory including a plurality of memory elements, wherein the prefetcher of each of the GPUs is to prefetch data from the memory to the cache of the GPU; and wherein the prefetcher of a GPU is prohibited from prefetching from a page that is not owned by the GPU or by the host processor.

公开(公告)号：US11847719B2

公开(公告)日：2023-12-19

申请号：US17695591

申请日：2022-03-15

申请人： Intel Corporation

发明人： Joydeep Ray ,  Abhishek R. Appu ,  Altug Koker ,  Balaji Vembu

IPC分类号： G06F15/16 ,  G06T1/20 ,  G06F12/0811 ,  G06F12/0815 ,  G06F12/0831 ,  G06F12/0888 ,  G06F12/0875 ,  G06T1/60

CPC分类号： G06T1/20 ,  G06F12/0811 ,  G06F12/0815 ,  G06F12/0831 ,  G06F12/0875 ,  G06F12/0888 ,  G06T1/60 ,  G06F2212/1024 ,  G06F2212/302 ,  G06F2212/455 ,  G06F2212/621

摘要： An apparatus and method are described for managing data which is biased towards a processor or a GPU. For example, an apparatus comprises a processor comprising one or more cores, one or more cache levels, and cache coherence controllers to maintain coherent data in the one or more cache levels; a graphics processing unit (GPU) to execute graphics instructions and process graphics data, wherein the GPU and processor cores are to share a virtual address space for accessing a system memory; a GPU memory addressable through the virtual address space shared by the processor cores and GPU; and bias management circuitry to store an indication for whether the data has a processor bias or a GPU bias, wherein if the data has a GPU bias, the data is to be accessed by the GPU without necessarily accessing the processor's cache coherence controllers.

公开(公告)号：US11810405B2

公开(公告)日：2023-11-07

申请号：US17539083

申请日：2021-11-30

申请人： Intel Corporation

发明人： Barath Lakshamanan ,  Linda L. Hurd ,  Ben J. Ashbaugh ,  Elmoustapha Ould-Ahmed-Vall ,  Liwei Ma ,  Jingyi Jin ,  Justin E. Gottschlich ,  Chandrasekaran Sakthivel ,  Michael S. Strickland ,  Brian T. Lewis ,  Lindsey Kuper ,  Altug Koker ,  Abhishek R. Appu ,  Prasoonkumar Surti ,  Joydeep Ray ,  Balaji Vembu ,  Javier S. Turek ,  Naila Farooqui

IPC分类号： G01C22/00 ,  G07C5/00 ,  G05D1/00 ,  G08G1/01 ,  H04L67/12 ,  G06N20/00 ,  G06F9/50 ,  G01C21/34 ,  B60W30/00 ,  G06N3/063 ,  G06N3/084 ,  G06N20/10 ,  G06N3/044 ,  G06N3/045 ,  G08G1/052 ,  G01S19/13 ,  H04L43/0852 ,  G05D1/02 ,  H04L43/16

CPC分类号： G07C5/008 ,  B60W30/00 ,  G01C21/34 ,  G01C21/3415 ,  G01C21/3492 ,  G05D1/0088 ,  G06F9/5027 ,  G06N3/044 ,  G06N3/045 ,  G06N3/063 ,  G06N3/084 ,  G06N20/00 ,  G06N20/10 ,  G08G1/012 ,  H04L67/12 ,  G01S19/13 ,  G05D1/0257 ,  G05D2201/0213 ,  G06F2209/509 ,  G08G1/0112 ,  G08G1/052 ,  H04L43/0852 ,  H04L43/16

摘要： An autonomous vehicle is provided that includes one or more processors configured to provide a local compute manager to manage execution of compute workloads associated with the autonomous vehicle. The local compute manager can perform various compute operations, including receiving offload of compute operations from to other compute nodes and offloading compute operations to other compute notes, where the other compute nodes can be other autonomous vehicles. The local compute manager can also facilitate autonomous navigation functionality.