- 专利标题： EXPANSION METHOD, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE
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申请号： US15983158申请日： 2018-05-18
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公开(公告)号： US20180323097A1公开(公告)日： 2018-11-08
- 发明人: Yukihiro IWANAGA , Kouji SUZUMURA , Tatsuya SAKUTA
- 申请人： HITACHI CHEMICAL COMPANY, LTD.
- 优先权： JP2012-282785 20121226
- 主分类号： H01L21/683
- IPC分类号： H01L21/683 ; H01L21/68 ; H01L23/00 ; H01L21/78
摘要：
An embodiment of the present invention relates to an expansion method comprising: a step (I) of preparing a laminate having a semiconductor wafer in which modified sections have been formed along intended cutting lines, a die bonding film and a dicing tape, a step (IIA) of expanding the dicing tape with the laminate in a cooled state, a step (IIB) of loosening the expanded dicing tape, and a step (IIC) of expanding the dicing tape with the laminate in a cooled state, dividing the semiconductor wafer and the die bonding film into chips along the intended cutting lines, and widening the spaces between the chips.
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