- 专利标题: HIGH SPEED SERIAL LINK FOR VIDEO INTERFACES
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申请号: US15685379申请日: 2017-08-24
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公开(公告)号: US20180338063A1公开(公告)日: 2018-11-22
- 发明人: David O'Neill , Amogh D. Thaly , David Rowe , Niall D. O'Connell , Lucas Valentin Garcia
- 申请人: Analog Devices Global
- 主分类号: H04N1/333
- IPC分类号: H04N1/333 ; H04N1/327
摘要:
This disclosure relates generally to communicating video content and other data over networks. An example apparatus includes a transmitter for communicating data via a serial link with a receiver. The transmitter includes an input, an output interface to the serial link, and translation circuitry. The input includes multiple input data lanes and a clock lane, and the input is configured to concurrently receive data on the multiple input data lanes aligned with a clock signal received on the clock lane according to a multi-lane communication protocol. The output interface is a clock-less interface and includes a number of output data lanes less than a number of the multiple input data lanes. The translation circuitry translates the data received according to the multi-lane communication protocol to a serial link communication protocol for transmission on the serial link.
公开/授权文献
- US10594892B2 High speed serial link for video interfaces 公开/授权日:2020-03-17
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