Invention Application
- Patent Title: CACHE AWARE SELF-REFERENTIAL STRUCTURE PEELING
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Application No.: US15650368Application Date: 2017-07-14
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Publication No.: US20190018664A1Publication Date: 2019-01-17
- Inventor: Suresh Mani , Dibyendu Das , Shivarama Rao , Ashutosh Nema
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Sunnyvale
- Main IPC: G06F9/45
- IPC: G06F9/45 ; G06F12/0802

Abstract:
Methods of compiling source code are provided. A method includes identifying a first array of structures (AOS), having a plurality of array elements, each array element being a structure with a plurality of fields, and performing structure peeling on the first AOS to convert a data layout of the first AOS to an array of structure of arrays (AOSOA) including a plurality of memory blocks of uniform block size. At least one of the plurality of memory blocks is allocated for each field of the plurality of fields. The method further includes allocating a number of complete memory blocks to accommodate all of the plurality of array elements of the AOS.
Public/Granted literature
- US10275230B2 Cache aware self-referential structure peeling Public/Granted day:2019-04-30
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