Invention Application
- Patent Title: SEMICONDUCTOR MEMORY DEVICE AND PRODUCTION METHOD THEREOF
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Application No.: US16183389Application Date: 2018-11-07
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Publication No.: US20190074294A1Publication Date: 2019-03-07
- Inventor: Tadashi IGUCHI , Murato Kawai , Toru Matsuda , Hisashi Kato , Megumi Ishiduki
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L27/11575 ; G11C16/04 ; H01L23/522 ; H01L27/11565

Abstract:
A semiconductor memory device according to an embodiment includes a memory cell array configured to have a memory string obtained by connecting first selection transistors, memory transistors, and second selection transistors in series. When three directions crossing each other are set to first, second, and third directions, respectively, the memory cell array has first conductive layers to be control gates of the first selection transistors, second conductive layers to be control gates of the memory transistors, and third conductive layers to be control gates of the second selection transistors, which are laminated in the third direction. Ends of the first conductive layers and ends of the third conductive layers are formed in shapes of steps extending in the first direction and ends of the second conductive layers are formed in shapes of steps extending in both directions of the first direction and the second direction.
Information query
IPC分类: