发明申请
- 专利标题: INTEGRATED CIRCUIT PACKAGE WITH TEST CIRCUITRY FOR TESTING A CHANNEL BETWEEN DIES
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申请号: US15933934申请日: 2018-03-23
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公开(公告)号: US20190295953A1公开(公告)日: 2019-09-26
- 发明人: Mayue XIE , Jong-Ru GUO , Zhiguo QIAN , Zuoguo WU
- 申请人: Intel Corporation
- 主分类号: H01L23/538
- IPC分类号: H01L23/538 ; H01L23/58 ; H01L25/065
摘要:
Apparatuses, systems and methods associated with integrated circuit packages with integrated test circuitry for testing of a channel between dies are disclosed herein. In embodiments, an integrated circuit (IC) package may include a first die, a second die, and a channel that couples the first die to the second die. The first die may include a transmitter, test circuitry coupled between the transmitter and the channel, wherein the test circuitry is to control charge and discharge of the channel, and a receiver coupled to the channel. The receiver may determine a voltage of the channel during charge and discharge of the channel, and output an indication of the voltage. Other embodiments may be described and/or claimed.