Each pixel of an active matrix substrate includes a TFT, the TFT including: a semiconductor layer; a gate electrode arranged on the semiconductor layer with a gate insulating layer interposed therebetween; a lower insulating layer covering the gate electrode and the semiconductor layer; and a source electrode and a drain electrode arranged on the lower insulating layer and in contact with the semiconductor layer in a source opening and a drain opening, respectively, of the lower insulating layer, wherein: the drain electrode includes a first portion in contact with only a portion of an exposed portion of the semiconductor layer that is exposed through the drain opening, a second portion located on a side surface of the drain opening, and a third portion located on an upper surface of the lower insulating layer; an upper insulating layer covering the TFT has an upper opening that partially overlaps with the drain opening; as seen from the direction normal to the substrate 1, the upper opening and the drain opening are located inside the semiconductor layer, and the drain electrode overlaps with only a portion of the drain opening and only a portion of the upper opening; and in a contact hole that includes the upper opening and the drain opening, the pixel electrode is in direct contact with at least the first portion and the second portion of the drain electrode and another portion of the exposed portion of the semiconductor layer.