公开(公告)号：US20190296050A1

公开(公告)日：2019-09-26

申请号：US16357362

申请日：2019-03-19

Applicant: Sharp Kabushiki Kaisha

Inventor： Keisuke YOSHIDA

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/417

Abstract: Each pixel of an active matrix substrate includes a TFT, the TFT including: a semiconductor layer; a gate electrode arranged on the semiconductor layer with a gate insulating layer interposed therebetween; a lower insulating layer covering the gate electrode and the semiconductor layer; and a source electrode and a drain electrode arranged on the lower insulating layer and in contact with the semiconductor layer in a source opening and a drain opening, respectively, of the lower insulating layer, wherein: the drain electrode includes a first portion in contact with only a portion of an exposed portion of the semiconductor layer that is exposed through the drain opening, a second portion located on a side surface of the drain opening, and a third portion located on an upper surface of the lower insulating layer; an upper insulating layer covering the TFT has an upper opening that partially overlaps with the drain opening; as seen from the direction normal to the substrate 1, the upper opening and the drain opening are located inside the semiconductor layer, and the drain electrode overlaps with only a portion of the drain opening and only a portion of the upper opening; and in a contact hole that includes the upper opening and the drain opening, the pixel electrode is in direct contact with at least the first portion and the second portion of the drain electrode and another portion of the exposed portion of the semiconductor layer.

公开(公告)号：US20200033684A1

公开(公告)日：2020-01-30

申请号：US16498501

申请日：2018-03-29

Applicant: Sharp Kabushiki Kaisha

Inventor： Kohhei TANAKA ,  Ryo YONEBAYASHI ,  Keisuke YOSHIDA ,  Takayuki NISHIYAMA ,  Tokihiro YOKONO

IPC: G02F1/1362 ,  H01L27/12 ,  G02F1/1335 ,  G02F1/1333 ,  G02F1/1368 ,  G02F1/1345 ,  G09G3/36 ,  G06F3/041

Abstract: Provided is a display device in which variation in white balance is suppressed even if wiring lines are arranged in pixels. The display device includes: gate lines; source lines 15S; drive elements connected to the gate lines and the source lines 15S; pixel electrodes connected to the drive elements; and color filters provided corresponding to the pixel electrodes. The pixel electrodes are provided in one-to-one correspondence with subpixels, and a plurality of subpixels 18R, 18G, and 18B constitute one pixel. The display device further includes wiring lines L provided in a pixel region so as to extend along either the gate lines or the source lines. At least some of the wiring lines L are arranged in pixel aperture regions of the subpixels 18. The arrangement pitch P1 of the wiring lines L is larger than the pixel pitch (3×Sa).

公开(公告)号：US20210026211A1

公开(公告)日：2021-01-28

申请号：US16935239

申请日：2020-07-22

Applicant: Sharp Kabushiki Kaisha

Inventor： Keisuke YOSHIDA ,  Kohhei TANAKA

IPC: G02F1/1362 ,  G02F1/1368 ,  G02F1/1333 ,  G02F1/1337 ,  G02F1/1339 ,  G02F1/1335

Abstract: A liquid crystal display device includes an active matrix substrate, a counter substrate, and a liquid crystal layer. The active matrix substrate includes a top gate type oxide semiconductor TFT a plurality of gate wiring lines a plurality of source and an interlayer insulating layer The counter substrate includes a plurality of columnar spacers provided on a second substrate. Each columnar spacer is disposed in an intersecting region where the gate wiring line and the source wiring line intersect. A front face of the active matrix substrate on the liquid crystal layer side includes a plurality of first ridges overlapping the plurality of gate wiring lines and a plurality of second ridges overlapping the plurality of source wiring lines.