Invention Application
- Patent Title: METHOD OF FABRICATING SEMICONDUCTOR DEVICE
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Application No.: US16361546Application Date: 2019-03-22
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Publication No.: US20190363054A1Publication Date: 2019-11-28
- Inventor: TAEHONG MIN , Chan HWANG
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Priority: KR10-2018-0060623 20180528
- Main IPC: H01L23/544
- IPC: H01L23/544 ; H01L45/00

Abstract:
A method of fabricating a semiconductor device includes providing a substrate including a first region and a second region. The method includes forming a first layer on the substrate. The first layer has a first hole on the first region and a second hole on the second region. The method includes forming a second layer in the first hole and the second hole. The method includes forming a mask pattern on the second region of the substrate. The method includes polishing the second layer to form a pattern in the first hole and an overlay key pattern in the second hole. A top surface of the overlay key pattern is further from the substrate than a top surface of the pattern in the first hole.
Public/Granted literature
- US10825777B2 Method of fabricating a semiconductor device with an overlay key pattern Public/Granted day:2020-11-03
Information query
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