SEMICONDUCTOR PACKAGE, PACKAGE-ON-PACKAGE DEVICE, AND METHOD OF FABRICATING THE SAME
Abstract:
A semiconductor package including a package substrate, a semiconductor chip on a first surface of the package substrate, a connection substrate on the package substrate and spaced apart from and surrounding the semiconductor chip, the connection substrate including a plurality of conductive connection structures penetrating therethrough, a plurality of first connecting elements between the semiconductor chip and the package substrate and electrically connecting the semiconductor chip to the package substrate, a plurality of second connecting elements between the connection substrate and the package substrate and electrically connecting the connection substrate to package substrate, a mold layer encapsulating the semiconductor chip and the connection substrate, and an upper redistribution pattern on the mold layer and the semiconductor chip and electrically connected to a corresponding one of the plurality of conductive connection structures may be provided.
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