Invention Application
- Patent Title: Highly Selective Dry Etch Process for Vertical FET STI Recess
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Application No.: US16165786Application Date: 2018-10-19
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Publication No.: US20200126805A1Publication Date: 2020-04-23
- Inventor: Zhenxing Bi , Muthumanickam Sankarapandian , Richard A. Conti , Michael P. Belyansky
- Applicant: International Business Machines Corporation
- Main IPC: H01L21/311
- IPC: H01L21/311 ; H01L21/762 ; H01L29/66 ; H01L29/78

Abstract:
Highly selective dry etching techniques for VFET STI recess are provided. In one aspect, a method for dry etching includes: contacting a wafer including an oxide with at least one etch gas under conditions sufficient to etch the oxide at a rate of less than about 30 Å/min; removing a byproduct of the etch from the wafer using a thermal treatment; and repeating the contacting step followed by the removing step multiple times until a desired recess of the oxide has been achieved. A method of forming a VFET device is also provided.
Public/Granted literature
- US10734245B2 Highly selective dry etch process for vertical FET STI recess Public/Granted day:2020-08-04
Information query
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