Invention Application
- Patent Title: THREE-DIMENSIONAL SEMICONDUCTOR DEVICES INCLUDING VERTICAL STRUCTURES
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Application No.: US16777999Application Date: 2020-01-31
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Publication No.: US20200168621A1Publication Date: 2020-05-28
- Inventor: Young Jin JUNG
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@72769224
- Main IPC: H01L27/11556
- IPC: H01L27/11556 ; H01L27/1157 ; H01L27/11565 ; H01L27/11582 ; H01L27/11573 ; G11C8/10 ; G11C16/08 ; H01L29/423 ; H01L27/11524

Abstract:
A three-dimensional semiconductor device is provided including a gate electrode disposed on a substrate and having a pad region, a cell vertical structure passing through the gate electrode, a dummy vertical structure passing through the pad region, and a gate contact plug disposed on the pad region. The cell vertical structure includes a cell pad layer disposed on a level higher than that of the gate electrode and a cell channel layer opposing the gate electrode, the dummy vertical structure includes a buffer region formed of a material different from that of the cell pad layer and a dummy channel layer formed of a material the same as that of the cell channel layer, and at least a portion of the buffer region is located on the same plane as at least a portion of the cell pad layer.
Public/Granted literature
- US10923489B2 Three-dimensional semiconductor devices including vertical structures Public/Granted day:2021-02-16
Information query
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