Invention Application
- Patent Title: EFFICIENT RANGE-BASED MEMORY WRITEBACK TO IMPROVE HOST TO DEVICE COMMUNICATION FOR OPTIMAL POWER AND PERFORMANCE
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Application No.: US16717258Application Date: 2019-12-17
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Publication No.: US20200233664A1Publication Date: 2020-07-23
- Inventor: Ren Wang , Chunhui Zhang , Qixiong J. Bian , Bret L. Toll , Jason W. Brandt
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F12/128 ; G06F12/0804 ; G06F9/38 ; G06F12/0811 ; G06F13/28 ; G06F12/0891 ; G06F12/0875 ; G06F12/0842

Abstract:
Method and apparatus for efficient range-based memory writeback is described herein. One embodiment of an apparatus includes a system memory, a plurality of hardware processor cores each of which includes a first cache, a decoder circuitry to decode an instruction having fields for a first memory address and a range indicator, and an execution circuitry to execute the decoded instruction. Together, the first memory address and the range indicator define a contiguous region in the system memory that includes one or more cache lines. An execution of the decoded instruction causes any instances of the one or more cache lines in the first cache to be invalidated. Additionally, any invalidated instances of the one or more cache lines that are dirty are to be stored to system memory.
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